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Showing 2 results for Cmos Technology
A Fully Integrated Range-Finder Based on the Line-Stripe Method
A. Saberkari, S. B. Shokouhi,
Volume 1, Issue 4 (10-2005)
Abstract
In this paper, an imaging chip for acquiring range information using by 0.35 μm CMOS technology and 5V power supply has been described. The system can extract range information without any mechanical movement and all the signal processing is done on the chip. All of the image sensors and mixed-signal processors are integrated in the chip. The design range is 1.5m-10m with 18 scales.
Low-Power Adder Design for Nano-Scale CMOS
S. R. Talebiyan, S. Hosseini-Khayat,
Volume 5, Issue 3 (9-2009)
Abstract
A fast low-power 1-bit full adder circuit suitable for nano-scale CMOS implementation is presented. Out of the three modules in a common full-adder circuit, we have replaced one with a new design, and optimized another one, all with the goal to reduce the static power consumption. The design has been simulated and evaluated using the 65 nm PTM models.
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© 2022 by the authors. Licensee IUST, Tehran, Iran. This is an open access journal distributed under the terms and conditions of the Creative Commons Attribution-NonCommercial 4.0 International (CC BY-NC 4.0) license.