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Showing 2 results for Flipped Voltage Follower

M. Piry, M. Khanjani Moaf, P. Amiri,
Volume 10, Issue 1 (3-2014)
Abstract

Class-AB circuits, which are able to deal with currents several orders of magnitude larger than their quiescent current, are good candidates for low-power and high slew-rate analog design. This paper presents a novel topology of a class AB flipped voltage follower (FVF) that has better slew rate and the same power consumption as the conventional class-AB FVF buffer previously presented in literature. It is thus suitable for low-voltage and low-power stages requiring low bias currents. These buffers have been simulated using 0.5µm CMOS Technology models provided by IBM. The buffer consumes 20µA from a 0.9V supply and has a bandwidth of 50MHz with a 18pF load. It has a slew rate of 9.8V/µs and power consumption of 42µw
N. Raj,
Volume 17, Issue 3 (9-2021)
Abstract

The performance of any system is decided by the circuit configurations used in its implementation. Current mirror is one of those circuit configurations which are widely used in analog system designs. The performance of current mirror is decided by its parameters which include large operating range, wide bandwidth along with very low input and very high output resistances. In this paper, a low voltage flipped voltage follower based current mirror is presented. The structure flipped voltage follower is initially modified using a feedback path which results in the low impedance node which when considered as input in the proposed current mirror results in an extremely low value of input resistance. Compared to conventional flipped voltage follower based current mirror design the proposed design works well with minimum error in microamperes range with extended bandwidth without affecting its output resistance. The input resistance gets scaled down to 17 ohms from 840 ohms whereas bandwidth gets almost doubled approximately to 4.5GHz from 2.4GHz. The power dissipation ranges in microwatts. The simulations are supported with mathematical analysis. The complete analysis is done in HSpice using MOS models of 0.18-micron technology at a dual supply voltage, ±0.5V.


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