Iranian Journal of Electrical and Electronic Engineering

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In this paper, we have investigated the effects of asymmetry in the source and drain capacitance of metallic island single electron transistors. By comparing the source and drain Fermi levels, in the ground and source referenced biasing configurations, with the island’s discrete charging energy levels for various gate voltages, we have derived a set of closed form equations for the device threshold voltage. Extending our technique, for the first time, we have also modeled the “kink effect” appearing in the device ID-VDS characteristic, next to the threshold voltage. To demonstrate how accurate the calculated values of the threshold and kink voltages obtained from the analytically derived formulas are, next, we have used the master equation based on the orthodox theory to simulate the device parameters, numerically. Comparisons of the numerical results, obtained from both techniques, have demonstrated the tolerances in our analytical calculations, for the worst case, are less than 1%.