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Showing 9 results for Oscillator

R. Kharel, K. Busawon, Z. Ghassemlooy,
Volume 4, Issue 4 (12-2008)
Abstract

In this paper, we propose a new chaos-based communication scheme using the observers. The novelty lies in the masking procedure that is employed to hide the confidential information using the chaotic oscillator. We use a combination of the addition and inclusion methods to mask the information. The performance of two observers, the proportional observer (P-observer) and the proportional integral observer (PI-observer) is compared that are employed as receivers for the proposed communication scheme. We show that the P-observer is not suitable scheme since it imposes unpractical constraints on the messages to be transmitted. On the other hand, we show that the PI-observer is the better solution because it allows greater flexibility in choosing the gains of the observer and does not impose any unpractical restrictions on the message.
P. M. Farahabadi, H. Miar-Naimi, A. Ebrahimzadeh,
Volume 5, Issue 1 (3-2009)
Abstract

New equations are proposed for frequency and amplitude of a ring oscillator. The method is general enough to be used for all types of delay stages. Using exact largesignal circuit analysis, closed form equations for estimating the frequency and amplitude of a high frequency ring oscillator are derived as an example. The method takes into account the effect of various parasitic capacitors to have better accuracy. Based on the loop gain of the ring, the transistors may only be in saturation or experience cutoff and triode regions. The analysis considers all of the above mentioned scenarios respectively and gives distinct equations. The validity of the resulted equations is verified through simulations using TSMC 0.18 µm CMOS process. Simulation results show the better accuracy of the proposed method compared with others.
A. Kumar, B. Chaturvedi,
Volume 14, Issue 2 (6-2018)
Abstract

This paper introduces four new resistorless circuits of first-order current-mode all-pass filter (CMAPF) based on dual-X current conveyor transconductance amplifier (DXCCTA). All the four circuits use a single DXCCTA and a capacitor for their realization. The main features of the proposed CMAPFs are: use of minimum active and passive components, resistorless realization, electronically adjustable pole frequency, easily cascadable, good sensitivity performance with respect to active and passive elements, low total harmonic distortion of output current (0.74%) and good operating frequency range (39.2 MHz). The non-ideal analysis of the proposed circuits has also been explored. Moreover, two applications of the proposed first-order CMAPF in terms of second order CMAPF and current-mode quadrature oscillator are also presented. HSPICE simulations have been carried out with 0.18 µm CMOS process parameters to validate the proposed circuits.

T. S. Arora,
Volume 16, Issue 2 (6-2020)
Abstract

Realization of a novel single-resistance-controlled oscillator, employing an active element and all grounded passive elements, is the purpose of this manuscript. With requirements for completing the design being only a single Voltage Differencing Current Conveyor and four grounded passive components, it is also a preferable choice for integrated circuit implementation. The designed circuit has an independent control of the frequency of oscillation and current mode output can be achieved from high impedance port, explicitly. Simulation results are presented using PSPICE software along with the regular mathematical analysis. At last experimental verification of the proposed circuit is shown using commercially available integrated circuits.

G. Morankar,
Volume 17, Issue 3 (9-2021)
Abstract

Tremendous developments in integrated circuit technology, wireless communication systems, and personal assistant devices have fuelled growth of Internet of Things (IoT) applications and smart cards. The security of these devices completely depends upon the generation of random and unpredictable digital data streams through random number generator. Low quality, low throughput, and high processing time are observed in software-based pseudo-random number generator due to interrelated data or programs and serial execution of codes respectively. In this paper, FPGA implementation of low power true random number generator through ring oscillator for IoT applications and smart cards is presented. Ring oscillators based on higher jitter and sampling techniques were exploited to present true random number generator. Further statistical parameters of the generated data streams are enhanced through feedback mechanism and post-processing technique. The presented true random number generator technique does not depend on the characteristics of a particular FPGA. The presented technique consumes low power, requires low hardware footprints and passes the entire National Institute of Standards & Technology (NIST) 800-22 statistical test suite. The presented low power and area true random number generator with enhanced security through post-processing unit may be applied for encryption/decryption of data in IoT and smart cards.

H. Ghonoodi, M. Hadjmohammadi,
Volume 17, Issue 4 (12-2021)
Abstract

In this paper a novel design is presented for a dual-band LC oscillator, using an analytical approach. The core of the proposed circuit contains a cross-coupled CMOS LC oscillator with two serried LC tanks so that the inductors of these tanks have mutual inductance. There are some switches in the circuit that directly changes mutual inductance to produce two different frequencies. This technique increases the oscillation amplitude in the same power consumption that leads to the decrement of phase noise. In other words, using two serried LC tank compensates the injected phase noise from switches. The symmetrical structure is another advantage of the presented design that makes it possible to be used in multiphase oscillator. To assess the quality of the proposed circuit, a dual-band quadrature LC oscillator has been designed to oscillate at 3.6 GHz and 6.4 GHz with 1.5 V supply and 1 mA current consumption, with TSMC 0.18 CMOS practical model. Lastly, simulation results confirm the correctness of analytical results and high proficiency of the proposed design.

E. Y. Burkin, F. A. Gubarev, V. V. Sviridov, D. V. Shiyanov,
Volume 19, Issue 3 (9-2023)
Abstract

A two-channel pulsed power supply for an imaging system with brightness amplification and independent synchronous laser illumination is designed. The power supply generates synchronized high-voltage pulses with a frequency of 16–24 kHz, an average electrical power of up to 1.2 kW, and an adjustable amplitude of up to 6.2 kV to pump copper bromide gas discharge tubes with independent control of the temperature parameters of the active medium. To generate pumping pulses for laser media, we used a two-channel thyratron circuit with a common source of stabilized voltage provided by a step-down pulse stabilizer and a bridge inverter-based circuit for the pulsed charge of storage capacitors. The voltage equalization on the storage capacitors is carried out by means of magnetic coupling of the charging inductances wound on a common core. Adjustable delay lines based on variable inductances provide synchronous operation of two brightness amplifiers with a synchronization accuracy of lasing pulses of ±1 ns. The power supply demonstrated stable operation with two gas discharge tubes having different characteristics, including those with different types of electrodes. It has been integrated into a laboratory facility for the study of high-energy materials combustion.

Arsen Ahmed, Hüseyin Demirel,
Volume 19, Issue 4 (12-2023)
Abstract

In the past twenty years, low-voltage and power design have gained attention in analog VLSI design, particularly for high-performance and portable integrated circuits (ICs). Because of the increasing density of large-scale integration, a single silicon A.S.I. chip could have thousands or even millions of transistors on it. A rise in integration levels led to the development of Fin-type Field Effect Transistor (FinFETs) technology. In this research, an improved circuit design for a floating active inductor (FAI) and quadrature sinusoidal oscillator (QSO) is implemented employing only two active filters, the Z-copy-Voltage Differential Transimpedance Amplifier (Zc-VDTA). The purpose of the FAI is to contain two Zc-VDTA and one resistor with a ground capacitor, and it is easy to integrate the parameters of the Zc-VDTA bias current (IB) through the adjustment of the circuit. In order to verify the dependability of the circuits designed using floating active inductance circuits, a Butterworth fourth-order low-pass filter was created via component replacement. All the simulations have been carried out on 7 nm using linear technology SPICE, and cadence virtuoso tool.
Chhaya Belwal, Kunwar Singh, Shireesh Kumar Rai,
Volume 20, Issue 2 (6-2024)
Abstract

This paper introduces a floating flux-controlled meminductor emulator, implemented using two voltage differencing differential difference amplifier (VDDDA) along with a memristor and capacitor. Grounded and floating configurations are simulated with TSMC 0.18 µm level-49 BSIM3 CMOS process parameters in LTspice, showcasing the performance of the proposed circuits. The circuit features electronic tunability, allowing for the adjustment of nonlinear flux through the tuning of bias voltage. Simulation results validate the frequency-dependent current-flux dynamics of the proposed meminductor emulator. The simulation results, which involve frequency-dependent pinched hysteresis loops, transient analysis, non-volatility, and Monte Carlo analysis of the proposed meminductor, affirm the functionality and adequacy of the proposed design. A Chua’s oscillator is realized using proposed VDDDA-based meminductor as non-linear element.

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