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Performance Analysis of Disk Type Variable Reluctance Resolver under Mechanical and Electrical Faults
F. Tootoonchian, F. Zare,
Volume 14, Issue 3 (9-2018)
Abstract
Disk Type Variable Reluctance (DTVR) resolvers have distinguished performance under run out fault comparing to conventional sinusoidal rotor resolvers. However, their accuracy under inclined rotor fault along with different types of eccentricities includes static and dynamic eccentricities are questioned. Furthermore, due to thin copper wires that are used for signal and excitation coils of resolver there is high risk of short circuit fault in the coils. So, in this study the performance of the sinusoidal rotor DTVR resolver under the mentioned faults are studied. The quality of output voltages along with position error of the sensor is discussed. 3-D time stepping finite element method is used to show the effect of different faults. Finally, the prototype of the studied resolver is constructed and tested. The employed test bed is built in such a way that is able to apply controllable level of different mechanical faults. Good agreement is obtained between the finite element and the experimental results, validating the success of the presented analysis.

Optimal Multiple FCLs Allocation Considering DG Penetration in Meshed Network With Multi-Level Voltages
M. Hosseinpour, J. Sadeh,
Volume 16, Issue 3 (9-2020)
Abstract
Increasing the short circuit current due to the penetration of distributed generations (DGs) in various voltage levels and meshed topology is a basic problem in power systems. Using fault current limiter (FCL) is an efficient approach to mitigate the exceeded short circuit levels. In this paper, a new approach is presented for multiple FCLs locating to decrease short circuit levels in meshed networks with several subsystems and multi-level voltages. Modified hybrid genetic algorithm (GA) and sensitivity analysis (SA) are used to determine the type, number, location, and voltage level of FCLs. Also, an effective sensitivity index is proposed, which can reduce the search space for optimal allocation. This method suggests the optimal allocation with the least investment cost in multi-level voltages networks according to the FCL costs. The proposed method is evaluated in the IEEE 30-bus, 57-bus, and 300-bus test systems. Numerical results indicate the accuracy and efficiency of the proposed method.

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© 2022 by the authors. Licensee IUST, Tehran, Iran. This is an open access journal distributed under the terms and conditions of the Creative Commons Attribution-NonCommercial 4.0 International (CC BY-NC 4.0) license.