Search published articles


Showing 2 results for Voltage Stress
A New Pulsating Power Elimination Method for Single-Phase PWM AC/DC Converters with Minimum Voltage and Current Stress
H. Rezaie, H. Rastegar, M. Pichan,
Volume 14, Issue 1 (3-2018)
Abstract
An inherent problem of single-phase rectifiers is the existence of a pulsating portion in the input power, which pulsates at twice the grid frequency. If this pulsating power is transferred to the DC-link, it causes a significant amount of second-order harmonic at the output voltage. Since in many applications, such a high level of DC oscillation is not acceptable, so the pulsating power must be effectively filtered. A convenient solution to eliminate the output voltage oscillations is to use a capacitor with a relatively high capacity at the rectifier output. Due to the fact that the high capacity capacitors for this application usually have a short lifetime and occupy a lot of space, this solution cannot be considered as a proper one. In this paper, a new active method with the minimum of current and voltage stress is proposed to effectively eliminate the pulsating power and significantly reduce the required capacitance of the output filter. The proposed method is able to reduce the volume of the converter and increase its reliability and power density. The validity and effectiveness of the proposed method are confirmed by extensive simulations in the MATLAB/Simulink.

High Step-Up Interleaved DC/DC Converter Using VM Cell for PV Applications
Amir Gallaj, Jaber Fallah Ardashir, Mojtaba Beiraghi,
Volume 18, Issue 4 (12-2022)
Abstract
This work proposes a high step-up interleaved dc/dc topology utilizing a VM (voltage multiplier) cell suitable for PV applications. The VM cells D/C (Diode/Cap.) are cascaded among the phases to approach a high voltage gain. Besides, the voltage converting ratio of the presented structure can be improved by extending the VM cells and it also leads to drop in the normalized voltage stress throughout the switches and some diodes. Therefore, by utilizing a semiconductor (Switch/Diode) with a lower rating leads to a decline in system losses. Also, the efficiency of the suggested topology will be considerable and the overall cost can be decreased. To elaborate on the main benefits of the proposed topology, a comparison has been made across other literature regarding the efficiency, peak voltage throughout the semiconductors and voltage ratio of the converter. To prove the accuracy principle of operation of the suggested converter, two prototypes (for n=1, 2 stages) were built and tested at 350 W and 453 W with an operating frequency of about 40 kHz performed.
 

Page 1 from 1     
Creative Commons License
© 2022 by the authors. Licensee IUST, Tehran, Iran. This is an open access journal distributed under the terms and conditions of the Creative Commons Attribution-NonCommercial 4.0 International (CC BY-NC 4.0) license.